1. Field of the Invention
The disclosure relates generally to circuits and read methods of RRAM, and more particularly to circuits and read methods for reducing the read disturbance voltage level on bit lines.
2. Description of the Related Art
Recently, new nonvolatile memory devices, such as a resistance random access memory (RRAM), have been proposed. A unit cell of the RRAM includes a data storage element which has two electrodes and a variable resistive material layer interposed between the two electrodes. The variable resistive material layer, i.e., a data storage material layer, has a reversible variation in resistance according to whether a filament, a conductive path or a low resistive path is formed through the resistive material layer by the electrical signal (voltage or current) applied between the electrodes.
However, current RRAM has big concerns with read disturbance. If the bit line voltage level is higher than a certain voltage (e.g. 0.3V, depending on the process) in read operation, the RRAM memory cell's resistance value is changed and it causes the read operation to fail. To reduce read disturbance, we need to keep the bit line voltage level as low as possible. However, if the bit line voltage level is too low, the read access time could be extended.